A RISC-V REVOLUTION: The Rise of Free and Open-Source Silicon for Makers

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A RISC-V REVOLUTION: The Rise of Free and Open-Source Silicon for Makers

Makers are well-used to the benefits of free and open-source hardware, from being able to study and iterate on designs by others, to the promise that if a design goes out of production you can always make replacements yourself.

Open-source silicon, though, is not so well understood — but thanks to the success of the RISC-V (“risk five”) project, that’s changing.

The idea of an open processor, designed around the concept of reduced instruction set computing (RISC), from which others could learn isn’t new: The Berkeley RISC project, which launched in 1981, famously published its research papers for all to read, providing a direct inspiration for Sophie Wilson and Steve Furber to create the Arm architecture that so many chipmakers pay to license today.

ARM ALTERNATIVE

The Berkeley RISC project inspired numerous processor projects, some open and others closed, but it was the launch of the RISC-V project in 2010 that truly lit a spark.

Born at the same university as the original, RISC-V is Berkeley’s fifth-generation RISC architecture — and by far its most successful. Originally pitched by Krste Asanović as a “short, three-month project” aimed at graduate students before attracting Berkeley RISC alum David Patterson, RISC-V has leapfrogged its forebears to become the most successful free and open-source architecture in history.

FREEDOM IN SILICO

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There’s an important distinction to note: “free” as well as “open source.” Sun’s microSPARC processor was open source, but not free: Anyone wishing to make modifications needed a commercial license. RISC-V, by contrast, is free-as-in-speech: Anyone can implement RISC-V either as-written or with as many tweaks, modifications, and extensions as they desire — and never have to pay a cent in royalties or license fees.

What began as a 3-month university project now ships millions of cores a year: RISC-V implementations are found in commercial products including smartwatches, fitness bands, storage products, and graphics cards, where the allure of true freedom — plus a bundle saved on license fees — has won out against the desire to keep proprietary IP suppliers on-side.

Unsurprisingly, RISC-V has also been making inroads into the maker sector — slowly at first, but gaining momentum with each passing year. Low-power microcontroller parts came first, with application processors soon following. Server-class hardware, including proposed 128-bit chips designed to accompany existing 32- and 64-bit parts, is right around the corner.

ARM IN ARM: Inspired by Berkeley’s 1981 RISC project,
Sophie Wilson (far left) and Steve Furber (third left)
created the Arm microprocessor architecture that’s
now ubiquitous.

FROM FPGAS TO CHIPS

At first, experimentation was a challenge. Few RISC-V designs had been committed to silicon, as the specification had yet to be ratified, so if you wanted to develop for RISC-V you needed to use field-programmable gate array (FPGA) hardware to run soft-core implementations — or even emulate RISC-V in software on a mainstream Arm or x86 chip.

SiFive, co-founded by Asanović himself, was one of the first to offer actual silicon chips — microcontrollers initially, then Linux-compatible cores on a single-board computer. Others followed: Today, you can buy RISC-V chips from Allwinner, Bouffalo Lab, GigaDevice, GreenWaves Technologies, and StarFive, with companies including Alibaba, Google, Seagate, and Western Digital developing chips for in-house use.

FIRST! SiFive’s FE310 SoC was the
industry’s first commercial RISC-V chip.

MAKING A SPLASH WITH MAKERS

The biggest news for the maker market, though, came from Espressif Systems when the company announced that not only was it launching RISC-V based products into the ESP32 microcontroller family but that it would concentrate solely on RISC-V architecture from now on, ditching proprietary alternatives like the Cadence Tensilica Xtensa architecture.

So all future ESPs will be RISC-V? “Yes, it is true,” Teo Swee Ann, Espressif chief executive and president, confirmed on LinkedIn. “Unless we have some special needs for something else that I don’t see now.”

What about the maker’s favorite mini computer? “The main things holding RISC-V back in the traditional Raspberry Pi/[Arm] Cortex-A market,” says Eben Upton, Raspberry Pi CEO, “are a lack of available high-end licensable cores — I don’t think I can go out and get anything that’s competitive with the Cortex-A72 in Raspberry Pi 4, for example — and a lack of software maturity in the Linux userland.”

“The barriers may be a little lower in the microcontroller/Cortex-M space, as the software stacks and core design space are simpler. If/when RISC-V really takes off,” Upton predicts, “that’s where it will happen first.”

SINGLE-BOARD SYSTEMS

There are numerous single-board computers that aim to offer a RISC-V alternative to Arm-based devices like the Raspberry Pi range. At first, choices were limited: SiFive’s boards offered impressive performance but priced themselves out of the maker market, while devices based on Allwinner’s D1 chip struggled with poor performance. Gadgets like Microchip’s PolarFire SoC Icicle Kit offer RISC-V cores, too, but they play second fiddle to the board’s FPGA resources.

But now, the StarFive VisionFive — a dual-core 64-bit single-board computer running Linux — offers a reasonably affordable entry point, with its follow-up, the VisionFive 2, boosting performance and slashing costs.

PINE64, best known for its Pinebook and Pinephone ranges, is also getting in on the act: After putting a RISC-V microcontroller inside the Pinecil and Pinecil 2 soldering irons, the company is now preparing to launch the Star64, an open-source single-board computer built atop the same StarFive JH7110 chip as the VisionFive 2.

BUILDING YOUR OWN CHIPS

For many makers, architecture will always take a back seat to features when it comes to choosing a chip. But RISC-V, and other free and open-source silicon efforts, provide a whole new playing field for the curious maker: The ability to get down and dirty with the architecture itself in a way that previously would have required a decade of education and a job application to Intel, AMD, Arm, or the like.

“RISC-V essentially gives you the freedom to implement and customize the processor core to your needs,” explains Stefan Wallentowitz, who sits on the board of RISC-V International to represent community members. “While the average maker will probably not build chips at a commercial scale, there are efforts like the Open Multi-Project Wafer for fully open-source chips,” he adds, referring to a Google-funded project that lets designers of open-source silicon have their chips built at SkyWater or GlobalFoundries fabrication facilities at absolutely zero cost — something never before possible. “Free and open-source silicon makes learning digital design and computer architecture accessible and fun.”

Even Intel, which has a vested interest in pushing people toward its own proprietary x86 architecture, would seem to agree: In August the company launched Pathfinder for RISC-V, a development environment for RISC-V systems-on-chips, with a free-of-charge Starter Edition which Intel has specifically pushed to the hobbyist, academic, and research communities.

FRESH LINUX SBCS: StarFive’s quad-core, 1.5GHz
RISC-V JH7110 processor is at the heart of their new
VisionFive 2 single-board computer (top) and also
PINE64’s new Star64 (bottom) — both with the familiar
Raspberry Pi-format GPIO header. Debian and Fedora
Linux distros are already being ported to the JH7110

“Intel Pathfinder for RISC-V represents our ongoing commitment to accelerate the adoption of RISC-V,” claimed Intel’s general manager for RISC-V ventures Vikay Krishnan at the launch, “and catalyze the ecosystem around an open source and standards-based vision.” 

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Gareth Halfacree

Gareth Halfacree is the author of the Raspberry Pi User Guide and an expert in educational and embedded computing. A noted technology journalist and long-time tech author, Gareth also has an extensive background in computing education.

View more articles by Gareth Halfacree

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