Voronoi mapping makes pretty, efficient circuit boards

Voronoi mapping makes pretty, efficient circuit boards

[The image above is the same board produced using Visolate, regular routing, and PCB etching]

Here’s a neat PCB routing tool, called Visolate, that uses Voronoi diagrams to minimize the number of tool cuts that are needed to cut out a circuit board. As long as you aren’t depending on specific trace dimensions to make your circuit work, it looks like it makes really pretty boards! [via metalab]

Cutting the Voronoi boundaries has both advantages and disadvantages. Compared with boundary tracing, the Voronoi method produces only one cut instead of two to separate traces. This can produce cleaner and more consistent results for closely spaced traces. While there is no guarantee that the overall length of the Voronoi toolpath will be shorter than boundary tracing, in practice on real board designs we found that the Voronoi toolpath was on average nearly 40% shorter (see paper below). The Voronoi method usually produces “fat” traces, thus maximizing current carrying capacity, though in its basic form there is no way to specify particular traces that should be fattened more than others. On the downside, the Voronoi traces will have different second-order properties, such as parasitic capacitance, than the originally designed traces.

Discuss this article with the rest of the community on our Discord server!